PD IEC TR 63133-2017 PDF

Full title and description

STB PD — IEC TR 63133:2017 — "Semiconductor devices - Scan based ageing level estimation for semiconductor devices". This Technical Report specifies a design technique for a performance-estimation storage element that can monitor semiconductor ageing and characterize an ageing level; the estimated ageing level can be used to improve the reliability of a system.

Abstract

IEC TR 63133:2017 describes a scan-based method and a storage-element design technique to estimate the ageing level of semiconductor devices. The approach enables on-chip monitoring of degradation so designers and reliability engineers can track device health and apply mitigation or lifetime-management strategies to improve system reliability.

General information

• Status: Published (Technical Report).
• Publication date: 11 October 2017.
• Publisher: International Electrotechnical Commission (IEC).
• ICS / categories: 31.080.01 (Semiconductor devices).
• Edition / version: Edition 1.0 (2017).
• Number of pages: 17 pages.

Scope

The report focuses on a scan-based technique for estimating the ageing level of semiconductor devices by integrating a performance-estimation storage element into device designs. It outlines the design concept and how the monitored ageing metrics can be used to characterise on-chip degradation and support system-level reliability decisions. The method is intended for implementation in integrated circuits and semiconductor components where lifetime and degradation tracking are required.

Key topics and requirements

• Design technique for a performance-estimation storage element (scan-based).
• Methods to monitor and quantify semiconductor device ageing and degradation.
• Recommendations for integrating ageing estimation into chip scan/test architectures.
• Use of estimated ageing level to support system reliability and lifetime management.
• Guidance aimed at device designers, test architects and reliability engineers within TC 47’s semiconductor device remit.

Typical use and users

Primary users are semiconductor design teams, reliability engineers, test and validation engineers, embedded-systems architects, and test-equipment vendors who need on-chip methods to detect and quantify device ageing. Standards committees and product qualification teams can also use the report as guidance when defining reliability-monitoring features.

Related standards

Related documents include general semiconductor-device standards and test/measurement series maintained by IEC TC 47 (for example the IEC 60747 series for semiconductor devices) and other test/scan-related standards in the industry (for example IEEE boundary-scan and related test architecture standards). These documents provide complementary product-specific requirements, test methods and boundary-scan/test-access architectures relevant when implementing scan-based ageing estimation.

Keywords

semiconductor; ageing; degradation; scan-based test; storage element; performance estimation; on-chip monitoring; reliability; TC 47.

FAQ

Q: What is this standard?

A: IEC TR 63133:2017 is a Technical Report that describes a scan-based design technique for estimating the ageing level of semiconductor devices using a performance-estimation storage element. It provides guidance rather than mandatory product requirements.

Q: What does it cover?

A: It covers the concept and design guidance for embedding a scan-compatible storage element that monitors device performance degradation and produces an estimate of the device’s ageing level, intended to support reliability assessment and lifetime management.

Q: Who typically uses it?

A: Semiconductor designers, reliability/test engineers, system integrators and test-equipment vendors use this TR to inform the design and verification of on-chip ageing-monitoring features and to align test architecture decisions with reliability goals.

Q: Is it current or superseded?

A: IEC TR 63133 was published on 11 October 2017 (Edition 1.0). As a Technical Report it remains a published guidance document; users should check IEC product listings or TC 47 maintenance records for any amendments or later related publications.

Q: Is it part of a series?

A: It is a standalone IEC Technical Report under the responsibility of IEC TC 47 (Semiconductor devices). It sits alongside other TC 47 standards and series (for example the IEC 60747 family) that cover device-specific specifications and test methods; those standards are commonly consulted together when addressing device design, testing and reliability.

Q: What are the key keywords?

A: semiconductor, ageing, degradation, scan-based, storage element, on-chip monitoring, reliability, TC 47.